# 锁相环

\begin{align*} \newcommand{\dif}{\mathop{}\!\mathrm{d}} \newcommand{\belowarrow}[1]{\mathop{#1}\limits_{\uparrow}} \newcommand{\bd}{\boldsymbol} \newcommand{\tx}{\text} \newcommand{\L}{\mathscr{L}} \newcommand{\p}{\partial\,} \end{align*}

# Intro of PLL

## Phase Detector

A phase detector is a circuit whose average output, $V_\tx{out}$ , is linearly proportional to the phase difference, $\Delta \phi$, between its two inputs (Fig. 16.1) The splope of the line is called the “gain” of the PD, $K_{PD}$

An example of a phase detecor is XOR gate(Fig. 16.2). However, the $\overline{V_\tx{out}} - \Delta \phi$ of XOR PD is not linear. (Fig. 16.3) （注意此处说的是平均输出电压）

## Basic PLL Topology

• 频率综合：产生 K 倍于参考频率的信号
• 减小时钟偏移：数字系统中常用
• 时钟恢复：在一些信号传输系统中会用到

$\omega_\tx{out} = \omega_\tx{in}+ \frac{\dif \Delta \phi}{\dif t}\\$

Fig. 16.7b 为 VCO 和 PD 的输出特性，用公式表示为：

\begin{aligned} \omega_\tx{out} &= \omega_0 + K_{VCO}V_\tx{cont}\\ \overline{V_{PD}} &= K_{PD} \Delta \phi \end{aligned}

V_\tx{cont,dc} = V_1 = \frac{\omega_1-\omega_0}{K_{VCO}}\\ \begin{aligned} \phi_0 &= \frac{V_1}{K_{PD}}\\ &= \frac{\omega_1-\omega_0}{K_{PD}K_{VCO}} \end{aligned}

1. 对于任意一个输入频率 $\omega_1$，都有唯一一个 $\phi_0$ 与之对应
2. 要想减少 $\phi_0$，就要增大 $K_{PD}K_{VCO}$

\omega_\tx{out} = \omega_0 + K_{VCO} f(\Delta \phi)\\ \Downarrow\\ \begin{aligned} \frac{\dif \omega_\tx{out}}{\dif t} &= \frac{\dif \omega_0}{\dif t} + K_{VCO} \frac{\dif f(\Delta \phi)}{\dif t}\\ &=K_{VCO}\cdot \frac{\dif f(\Delta \phi)}{\dif \Delta \phi}\Bigg\vert_{v = V_0} \cdot \frac{\dif \Delta \phi}{ \dif t}\\ &=0 \end{aligned}\\
The PD gain drops to zero at $V_0$, thus $V_\tx{out}$ is time irrelevant and the feedback loop fails.

## Dynamics of Simple PLL

• 对于 PD，它将相位差转换为电压，故它的传递函数为 $V = K_{PD} (\phi_\tx{out} - \phi_\tx{in})$
• LPD 的传输函数可以设为 $\dfrac{1}{1+s/\omega_{LPF}}$
• VCO 将电压转化为频率，又因为频率是相位的微分，所以传输函数为 $\dfrac{K_\tx{VCO}}{s}$

\begin{aligned} H(s)|_\tx{open} &= \frac{\Phi_\tx{out}}{\Phi_\tx{out}}(s)\\ &= K_PD \cdot \frac{1}{1+\dfrac{s}{\omega_{LPF}}}\cdot \frac{K_{VCO}}{s} \end{aligned}

$H(s)|_\tx{close} = \frac{K_{PD}K_{VCO}}{\dfrac{s^2}{\omega_{LPF}}+s+K_{PD}K_{VCO}}$

H(s) = \frac{\omega_n^2}{s^2+2\zeta \omega_n s+\omega_n^2}\\ \tx{damping factor } \omega_n = \sqrt{\omega_{LPF} K_{PD} K_{VCO}}\\ \tx{natural frequency } \zeta = \frac{1}{2} \sqrt{\frac{\omega_{LPF}}{K_{PD}K_{VCO}}}\\ \begin{aligned} \tx{poles } s_{1,2} &= -\zeta \omega_n \pm \sqrt{(\zeta^2-1)\omega_n^2}\\ &= (-\zeta \pm \sqrt{\zeta^2-1})\omega_n \end{aligned}
• $\zeta\gt 1$，poles are real, 过阻尼
• $\zeta = 1$, 临界阻尼
• $\zeta \lt 1$, he poles are complex, 欠阻尼

$\zeta \omega_n =\frac{1}{2}\omega_{LPF}$

# Charge-Pump PLLs

## Phase/Frequency Detector

1. 当 A 的上升沿先到时，QA = 1；而当 B 的上升沿到时，QB = 1，经过与门后会将 QA 重置为 0
2. 反之，若 B 先到，则 QB 会输出一段时间的脉冲

## Basic Charge-Pump PLL

$\frac{V_\tx{out}}{\Delta \phi}(s) = \frac{I_P}{2\pi C_P}\cdot \frac{1}{s}$

$H(s)|_\tx{open} = \frac{\Phi_\tx{out}}{\Phi_\tx{out}}(s) = \frac{I_P}{2\pi C_P} \frac{K_{VCO}}{s^2}$

$H(s)|_\tx{close} = \frac{\dfrac{I_P K_{VCO}}{2\pi C_P}}{s^2+\dfrac{I_P K_{VCO}}{2\pi C_P}}$

$\frac{V_\tx{out}}{\Delta \phi}(s) = \frac{I_P}{2\pi }\cdot (R_P+\frac{1}{C_P s})$

$H(s)|_\tx{open} = \frac{\Phi_\tx{out}}{\Phi_\tx{out}}(s) = \frac{I_P}{2\pi}(R_P + \frac{1}{C_P s}) \frac{K_{VCO}}{s}$

$H(s)|_\tx{close} = \frac{\dfrac{I_P K_{VCO}}{2\pi C_P}(R_P C_P s+1)}{s^2+\dfrac{I_P}{2\pi} K_{VCO} R_P s+\dfrac{I_P}{2\pi C_P} K_{VCO}}$

$\omega_n = \sqrt{\dfrac{I_P K_{VCO}}{2\pi C_P}}\\ \zeta = \frac{R_P}{2}\sqrt{\dfrac{I_P C_P K_{VCO}}{2\pi}}$ $\zeta \omega_n = \frac{R_P I_P K_{VCO}}{4 \pi}$

# Nonideal Effects in PLLs

## PFD/CP Nonidealities

Dead Zone（死区） If the input phase difference $\Delta \phi$ is too small, the pulses on $Q_A$ or $Q_B$ may not have enough time to reach a logical high level and fail to turn on the charge pump switches. We refer this region of $\Delta \phi$ “dead zone” ($\pm \phi_0$ in Fig. 16.41)

The dead zone will cause jitter as it allow the VCO to accumulate as much random phase error as $\phi_0$.

Delay Difference Between $Q_A$ and $Q_B$ 简而言之就是 由于 $Q_A$ 经过了一个反相，会滞后于 $Q_B$，解决方法就是在 $Q_B$ 上加一个传输门（Fig. 16.44）

The Mismatch Between The Drain Currents of $M_1$ and $M_2$（充、放电电流失配），这会导致 $V_\tx{cont}$ 在 $\Delta phi=0$ 时不能保持恒定（Fig. 16.45a）。在存在某个特殊的相位差时，Net Current=0，此时 $V_\tx{cont}$ 才能恒定（但实际还是有波纹）。

Charge-Sharing Phenomenon 由于 MOS 存在电容，所以在开关打开时，电荷会在电容之间平分，导致 Vcont 电压下降（Fig. 16.46），解决方法很简单，添加 bootstrapping 来给电容预充电。